1. Field of the Invention
This application relates to a non-volatile semiconductor memory device.
2. Description of Related Art
A flash memory, which is a non-volatile semiconductor memory device, stores electric charges in floating gates thereof. A cell transistor, provided at a position where a bit line and a word line of the flash memory intersect with each other, includes a floating gate. The bit line is coupled to a drain of the cell transistor, the word line is coupled to a control gate of the cell transistor, and a source line is coupled to a source of the cell transistor. The flash memory has a state where electrons (negative charges) are not being injected in the floating gate (data 1: erased state) and a state where electrons are being injected therein (data 0: programmed state).
Techniques related thereto are discussed in Japanese Laid-open Patent Publication No. H11-110977, Japanese Laid-open Patent Publication No. 2005-122841, Japanese Laid-open Patent Publication No. 2005-174414, Japanese Laid-open Patent Publication No. 2006-294142 or the like.